Logical Design of n-bit Comparators: Pedagogical Insight from Eight-Variable Karnaugh Maps
Ali Muhammad Ali Rushdi *
Department of Electrical and Computer Engineering, King Abdulaziz University, P.O.Box 80204, Jeddah 21589, Saudi Arabia.
Sultan Sameer Zagzoog
Department of Electrical and Computer Engineering, King Abdulaziz University, P.O.Box 80204, Jeddah 21589, Saudi Arabia.
*Author to whom correspondence should be addressed.
Abstract
An -bit comparator is a celebrated combinational circuit that compares two -bit inputs and and produces three orthonormal outputs: G (indicating that is strictly greater than ), E (indicating that and are equal or equivalent), and L (indicating that is strictly less than ). The symbols ‘G’, ‘E’, and ‘L’ are deliberately chosen to convey the notions of ‘Greater than,’ ‘Equal to,’ and ‘Less than,’ respectively. This paper analyzes an -bit comparator in the general case of arbitrary and visualizes the analysis for on a regular and modular version of the 8-variable Karnaugh-map. The cases 3, 2, and 1 appear as special cases on 6-variable, 4-variable, and 2-variable submaps of the original map. The analysis is a tutorial exposition of many important concepts in switching theory including those of implicants, prime implicants, essential prime implicants, minimal sum, complete sum and disjoint sum of products (or probability-ready expressions).
Keywords: Comparator, Karnaugh map, prime implicant, minimal sum, complete sum, probability-ready expression.