Individual Character Comparison Technique for Improving the Internal Memory Performance
Jasim A. Ghaeb *
Faculty of Engineering, Philadelphia University, P.O.Box 19392, Amman, Jordan.
*Author to whom correspondence should be addressed.
Abstract
The efficiency of the cache mapping technique depends on how the cache lines are organized and the way that is used to look for and hit the target cache line. In this paper, an efficient technique is proposed to obtain a significant improvement in average hit time of a line in the cache. The paper presents Distributive Comparison Approach (DCA) that significantly minimizes the hit time and improve cache hit ratio. The efficient of DCA is based on how the cache lines are compared and picked up the coveted one leading to a low cache hit ratio. In DCA, the cache line is assigned by multi tags where each individual tag is only one character. Then, instead of one line tag of complete characters per a comparison cycle, the comparator is flushed by multi tags of different lines in the cache. Also the cache lines that are come from the main memory classified into two groups; even and odd line's tags to reject the unwanted lines form the multi-tag comparison. These two procedures practically speed up the repelling of misfit tagged lines and consequently the hitting of the target line in the cache. Simulation results show that the DCA outperforms well-known mapping techniques including FAMT and SMT.
Keywords: Cache memory, memory hierarchy, cache hit ratio, two-level memory, cache mapping.